A 0 . 8 ps - LSB , 10 - bit , 0 . 018 mm 2 Time - to - Digital Converter
نویسندگان
چکیده
A time-to-digital converter, using a charge pump to translate time interval into charge and a SAR-ADC quantizing the charge, can achieve sub-picosecond resolution. To improve the linearity and area occupation, we propose a sampling method and a layout pattern for the capacitive DAC in the SAR-ADC. The prototype chip was fabricated in 65nm CMOS. The measured DNL and INL are -0.6/0.8 ps and -2.56/2.48 ps, respectively, with the resolution of 0.8 ps, and the range of 10-bit. The measured single-shot-precision is 0.6 ps. The power consumption is 2.9 mW at the conversion rate of 50 MS/s, and the core area is 0.018 mm 2 .
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